1. Field of the Invention
This invention relates to a method for producing a semiconductor device, and more specifically to a method of molding a semiconductor device. This invention also relates to a molding die for use in molding a semiconductor device.
2. Description of the Related Art
As electronic devices have become more smaller and thinner, the velocity and the complexity of IC chip become more and more higher. Accordingly, a need has arisen for higher package efficiency. Demand for miniaturization is the primary catalyst driving the usage of advanced packages such as chip scale packages (CSP) and flip chips. Both of them greatly reduce the amount of board real estate required when compared to the alternative ball grid array (BGA) and quad flat pack (QFP). Typically, a CSP is 20 percent larger than the die itself, while the flip chip has been described as the ultimate package precisely because it has no package. The bare die itself is attached to the substrate by means of solder bumps directly attached to the die.
FIG. 1 discloses a semiconductor chip 10 mounted to a substrate 20 using the flip chip technique described above. Since the coefficient of thermal expansion (CTE) of the semiconductor chip 10 and that of the substrate 20 are usually quite mismatched. Typically, the semiconductor chip has a CTE of about 3-5 parts per million per degree Celsius (ppm/xc2x0C.) while the CTE of a substrate is about 20-30 ppm/xc2x0C. Thus, an underfill 30 is preferably formed between the chip 10 and the substrate 20 for sealing the gap between the solder joints 12. The underfill 30 provides stress relief in the solder joints 12 due to CTE mismatch between chip and substrate.
Underfill material is typically laid down along the edge surface of the chip 10 by using an automated underfill dispense system; then, the underfill material is pulled under the chip 10 by capillary action. However, such a method has a disadvantage that it takes time to form the underfill by filling the underfill material into the gap between the chip 10 and the substrate 20 along the edge surface of the chip 10.
Therefore, the semiconductor industry develops a method of forming a package body sealing the gap between the chip and the substrate by transfer molding. FIG. 2 shows a conventional transfer molding die comprising two cavities respectively installed with a chip mounted on a substrates by flip-chip bonding. As shown in the FIG. 2, the molding die is provided with a pot 40 for storing molding material. The pot 40 is connected to a cavity 46 through a runner 42 and a gate 44. After the semiconductor device is positioned in the cavity 46 of the molding die, the molding material is positioned in the pot 40, and the molding die is closed and clamped. Then a transfer ram 48 is moved (up in FIG. 2) to compress the molding material such that the liquefied molding material is forced through the runner 42 and the gate 44 to fill the cavity 46 for sealing the gap between the chip 10 and the substrate 20. However, since the gap between the chip 10 and the substrate 20 is very small (typically 0.05xcx9c1 mm), air is prone to be entrapped therein with no where to escape, thus leaving a void 32. This will cause reliability problem in the mechanical and electrical interconnections (i.e., the solder joints 12) between the chip 10 and the substrate 20.
U.S. Pat. No. 5,998,243 discloses another method for molding a semiconductor device in which the mold cavity is maintained under high vacuum (about 10 torr or below) thereby significantly suppressing the formation of voids between the chip and the substrate after encapsulation. Referring to FIG. 3, the molding die according to a preferred embodiment disclosed in U.S. Pat. No. 5,998,243 is provided with a vacuum pump (not shown) for exhausting the cavity 46 to reduce the pressure thereof through an exhaust vent 50. Typically, the channel 54 for connecting the cavity 46 to the exhaust vent 50 has a size smaller than the average diameter of filler particles in the molding material thereby preventing the molding material from entering the exhaust vent 50. However, such a method for molding a semiconductor device has a disadvantage that it is not easy to ensure proper and effective maintenance of the vacuum pump. Further, vacuum pump significantly increases the cost of this mold die.
It is a primary object of the present invention to provide a method of molding a semiconductor device which is capable of solving the above-mentioned void problem of prior art and forming a package body sealing the gap between the chip and the substrate in a short time.
It is another object of the present invention to provide a molding die for use in molding semiconductor device which is capable of forming a package body sealing the gap between the chip and the substrate in a short time as well as suppressing the formation of voids.
Accordingly, in a first aspect, the present invention provides a method of molding a semiconductor device comprising the steps of: (a) providing a molding die comprising a molding portion having a cavity for accepting the semiconductor device, a dummy cavity connected to the cavity and an air vent connected to the dummy cavity; (b) closing and clamping the molding die in a manner that the semiconductor chip is positioned in the cavity; (c) transferring a molding material into the cavity and the dummy cavity; (d) hardening the molding material; (e) unclamping and opening the molding die to take out the molded product. The molding method of the present invention is characterized in that even though the cavity with the semiconductor device positioned therein is filled, the transfer ram keeps moving such that the molding material is forced to continue flowing into the dummy cavity. Therefore, air supposed to be entrapped between the chip and the substrate will be squeezed out along with the molding flow into the dummy cavity such that the occurrence of voids in the cavity can be significantly reduced.
According to a second aspect, this invention further provides a molding die for use in molding a semiconductor device. The molding die mainly comprises a pot for storing molding material, a molding portion and a runner. The molding portion has a cavity for accepting the semiconductor device, a dummy cavity connected to the cavity and an air vent connected to the dummy cavity. The runner has one end connected to the pot and the other end connected to the cavity through a gate. The channel for connecting the cavity to the dummy cavity has a size substantially the same as the size of the gate such that during molding, the molding material will fill the cavity through the runner and the gate, and then fill the dummy cavity through the channel.